The present invention relates to a liquid crystal display which drives the liquid crystal by using an active matrix substrate on which a thin-film transistor (hereinafter, referred to TFT (Thin Film Transistor) is formed, and also concerns a manufacturing method for such a liquid crystal display.
As illustrated in FIG. 14, in a conventional liquid crystal display using a TFT as a switching element, on a glass substrate 101 are placed a gate electrode 102 formed through the same process, gate wiring (not shown) connected to the gate electrode 102 and a source signal input terminal 103.
Moreover, a gate insulation film 105 is formed on the entire surface of the glass substrate 101, except for a terminal section contact hole 104 formed on the source signal input terminal 103. On the gate electrode 102 are placed, through a gate insulation film 105, an amorphous silicon semiconductor layer (hereinafter, referred to as a-Si layer) 106 and an amorphous silicon semiconductor layer (hereinafter referred to as n+ a-Si layer) 107. The n+ a-Si layer 107, which is an amorphous silicon semiconductor layer to which an impurity is added, is an ohmic contact layer that is provided so as to ohmic-connect the a-Si layer 106 to a source electrode and a drain electrode, which will be described later.
A source electrode 108 and a drain electrode 109 are placed on the a-Si layer 106 and n+ a-Si layer 107, and a source wire 110 is formed integrally with the source electrode 108 through the same process.
A TFT 111 is constituted by the gate electrode 102, a-Si layer 106, n+ a-Si layer 107, source electrode 108, and drain electrode 109, etc., arranged as described above.
Moreover, a protective film 113 and a resin layer 114, which are used for protecting one portion of the source wire 110 and the TFT 111, are formed except for the terminal section contact hole 104 and a display section contact hole 112 formed on the drain electrode 109.
Moreover, the connection electrode 115 is joined to the source signal input terminal 103 so that the source wire 110 and the source signal input terminal 103 are connected to each other through the terminal contact hole 104. Moreover, the display electrode layer 116 and the drain electrode 109 are connected through the display contact hole 112.
The above-mentioned conventional liquid crystal display is manufactured through the following processes (1) to (8):
(1) First, a metal thin film, composed of titanium (Ti), aluminum (Al), or chromium (Cr), etc., is formed on a washed glass substrate 101 by sputtering, etc. Then, a photolithographic technique, which carries out etching by using a mask that is formed by applying photoresist to the metal thin film and exposing and developing it, is used to simultaneously form the gate electrode 102, the gate wire connected to the gate electrode 102 and the source signal input terminal 103.
(2) SiNx, which forms a gate insulation film 105, is formed thereon by using a mixed gas of SiH4/NH3/N2 through a P-CVD method.
(3) an a-Si film is formed on the gate insulation film 105 by using SiH4/H2.gas through a P-CVD method. In the same manner, an n+a-Si film is formed by using SiH4/H2.gas with mixed PH3 through a P-CVD method. Thereafter, the a-Si layer 106 and the n+a-Si layer 107 are patterned through a photolithography technique, etc.
(4) Moreover, a multi-layer structure metal thin-film, such as an Al/Ti thin-film, is formed, and this metal thin film is patterned through a photolithography technique, etc.
so that a source electrode 108, a drain electrode 109 and a source wire 110 are formed.
(5) Next, SiNx is deposited by a P-CVD method using a mixed gas of SiH4/NH3/N2 to form a protective film 113.
(6) On the protective film 113, a resin layer 114, which serves as a second protective film, is patterned and formed through a photolithography method, etc., and is subjected to a heating process, etc. to cure the resin. In this state, terminal section contact holes 104 and display section contact holes 112 are formed in the resin layer 114.
(7) Next, in the terminal section contact hole 104, the gate insulation film 105 and the protective film 113 are simultaneously etched and removed by using the source wire 110 and the resin layer 114 as masks. Here, with respect to the display section contact hole 112 formed in the process (6), since the drain electrode 109 serves as an etching stopper, the gate insulation film 105 beneath it is allowed to remain.
(8) The connection electrode 115 and the display electrode 116 are formed.
Moreover, as illustrated in FIG. 15 (a) and FIG. 15(b), in another liquid crystal display, on an insulation substrate 201 made of glass, etc., a gate wire 202 on which a gate signal input terminal 202a and a gate electrode 202b are integrally formed, a support capacity wire 204, a support capacity electrode 204b and support capacity signal input terminal 204a connected to the support capacity wire 204 are formed.
Then, on top of these layers, through a gate insulation film 207, are formed an a-Si layer 208a made of an amorphous silicon semiconductor layer, and an n+a-Si layer 208b that is an amorphous silicon semiconductor layer to which impurities such as phosphor (P) are added so as to realize ohmic connections between the a-Si layer 208a and a source electrode 209b as well as a drain electrode 210.
Next, after a multi-layer structure film, such as an Al/Ti film, not shown, has been deposited on the a-Si layer 208a and n+a-Si layer 208b that are the semiconductors, a source electrode 209b, a drain electrode 210 and a source wire 209 that serves as bus wiring for them are formed. Moreover, a TFT 211 is formed by the source wire 209, a source electrode 209b and a source signal input terminal 209c that are integral with the source wire 209 and a drain electrode 210.
Next, an overcoat layer 212, made of an insulation film such as SIN, for protecting the source wire 209 and TET 211, and a resin insulation film 213 made of an insulation photosensitive acrylic resin, etc. are successively laminated so that an overcoat layer having a two-layer structure is formed.
Next, the resin insulation film 213, made of a photosensitive acrylic resin, etc., is exposed in an exposing process by using a predetermined mask, and then subjected to a developing process so that a contact hole 215 is formed in the resin insulation film 213. Simultaneously with this process, the resin insulation film 213 over the source signal input terminal 209c, the gate signal input terminal 202a and support capacitor signal input terminal 204a is removed therefrom.
By using the resin insulation film 213 thus patterned as a mask for an etching process, the overcoat layer 212 located at the bottom of the contact hole 215, and the overcoat layer 212 covering the source signal input terminal 209c, the gate signal input terminal 202a and the supplementary capacitance signal input terminal 204a are simultaneously removed.
Successively, by using the resin insulation film 213 patterned as described above as a mask for an etching process, the gate insulation film 207 covering the gate signal input terminal 202a and the supplementary capacitance signal input terminal 204a is removed therefrom.
Next, a pixel display electrode 214, which is used for applying a voltage to liquid crystal formed over the surface of the resin insulation film 213 including the inside of the contact hole 215 formed in the resin insulation film 213, is formed so that the drain electrode 210 on the base section of the contact hole 215 is electrically connected.
However, the above-mentioned manufacturing method for the conventional liquid crystal display has raised the following problems.
In the liquid crystal display having the arrangement shown in FIG. 14, upon simultaneously etching the gate insulation film 105 and the protective film 113 in the above-mentioned process (7), since the source wire 110 serving as the mask is not etched at all, the gate insulation film 105, placed beneath the source wire 110, is selectively etched quickly. This results in a state in which the gate insulation film 105 comes under the source wire 110 (a reversely-tapered shape), and when the connection electrode 115 is formed in the process (8), a step discontinuity section 117 of the connection electrode 115, shown in FIG. 6, tends to be formed. Such a step discontinuity section 117 raises a problem of disconnection between the source signal input terminal 103 and the source wire 110.
Moreover, in the manufacturing method of the liquid crystal display shown in FIG. 15(a) and FIG. 15 (b), with respect to the etching rate, the following relationship is given between the resin insulation film 213 and the overcoat layer 212: (etching rate of the resin insulation film 213) less than (etching rate of the overcoat layer 212). Moreover, in the case when the etching rate of the drain electrode 210 is not more than {fraction (1/10)} of that of the overcoat layer 212, while the gate insulation film 207 corresponding to portions of the gate signal input terminal 202a and the supplementary capacitance signal input terminal 204a is being etched, the etching process inside the contact hole 215 stops progressing downward, while it starts proceeding sideways, with the result that the etched portion of the overcoat layer 212 reaches the rear face of the resin insulation film 213, forming a reversely-tapered shape 217.
Consequently, in this state, a step discontinuity occurs in the pixel display electrode 214 that is formed in a succeeding process, resulting in failure in providing electrical connections in the pixel display electrode 214.
The objective of the present invention is to provide a liquid crystal display which makes it possible to avoid the occurrence of a step discontinuity in an electrode for making a connection to a connecting section inside a contact hole, and a manufacturing method for such a liquid crystal display.
In order to achieve the above-mentioned objective, the liquid crystal display of the present invention is provided with a terminal section, formed on a substrate, to which signals are inputted from outside, an insulation layer formed on the terminal section, film-shaped wiring that is connected to electrodes of thin-film switching elements formed on each pixel, and a connection conductive film, placed in the contact hole, for connecting the terminal section and the end portion of the wiring. In this arrangement, a semiconductor layer is formed between the wiring and the insulation layer, and the insulation layer, the semiconductor layer and the end portion of the wiring are allowed to respectively protrude toward the inside of the contact hole, with respective depths in this order.
Here, consideration is given to a case in which, upon forming a contact hole in an insulation layer, the insulation layer at the formation position of the contact hole is etched and removed by using, for example, the above-mentioned wiring as a mask. In general, the wiring is formed by using a material that is not etched by gas, etc. used at the time of etching the insulation layer. In this case, if the above-mentioned semiconductor layer is not formed, the insulation layer located under the wiring will be selectively etched rapidly through the etching process at the time of the formation of the contact hole. For this reason, the pattern end of the insulation layer will come to have a reversely-tapered shape.
In contrast, in the arrangement of the present invention, the semiconductor layer is formed between the insulation layer and the end portion of the wiring. For example, supposing that the semiconductor layer has an etching rate slower than that of the insulation layer, in an etching process using the wiring as a mask, not only the insulation layer, but also the semiconductor layer is etched although the rate thereof is slow. For this reason, the above-mentioned insulation layer is not selectively etched rapidly. Therefore, it is possible to form the pattern end portion of the insulation layer into a forwardly-tapered shape.
With this arrangement, when the terminal section and the connection end portion of the wiring are connected by the connection conductive film through the contact hole, the connection conductive film is free from a step discontinuity at the pattern end of the insulation layer, thereby making it possible to improve the reliability of the connection.
In order to achieve the above-mentioned objectives, the manufacturing method of the liquid crystal display of the present invention is provided with: a first step for forming a terminal section and a gate electrode made of a metal film on an insulation substrate; a second step for forming an insulation layer that covers the terminal section and the gate electrode; a third step for forming a semiconductor film and an ohmic contact film on a connection end portion of the terminal section and the gate electrode so that a film is patterned and formed on the terminal section and a semiconductor operation layer of a thin-film transistor is patterned and formed on the gate electrode, by the semiconductor film and the ohmic contact film; a fourth step for forming wiring so that the connection end portion of the wiring is placed on the film; a fifth step for forming a contact hole by etching and removing the insulation layer by using the wiring as a mask; and a sixth step for connecting the wiring and the terminal section by a connection conductive film through the contact hole.
In accordance with the above-mentioned method, during a process for forming a semiconductor operation layer of the thin-film transistor, the film is formed on the connection end portion of the terminal section through the gate insulation film. In other words, the film is formed in the same process that forms the semiconductor operation layer of the thin-film transistor; therefore, it is not necessary to increase the number of processes for forming films.
Therefore, it becomes possible to positively connect the terminal section and the connection end portion of the wiring by using the connection conductive film with ease without increasing the number of processes, and consequently to ensure the reliability of the connection.
Moreover, in the case when, upon forming a contact hole in an insulation layer, the insulation layer at the formation position of the contact hole is etched and removed by using the wiring as a mask, the wiring is generally formed by using a material that is not etched by gas, etc. used at the time of etching the insulation layer. In this case, if the above-mentioned film is not formed, the insulation layer located under the wiring will be selectively etched rapidly through the etching process at the time of the formation of the contact hole. For this reason, the pattern end of the insulation layer will come to have a reversely-tapered shape.
In contrast, in accordance with the above-mentioned method, the film which has an etching rate slower than that of the insulation layer is placed between the insulation layer and the connection end portion of the wire in a manner so as to be extended toward the inside of the contact hole from the connection end portion of the wiring. Therefore, in an etching process using the wiring as a mask, not only the insulation layer, but also the film is etched although the rate thereof is slow. For this reason, the above-mentioned insulation layer is not selectively etched rapidly. Therefore, it is possible to form the pattern end portion of the insulation layer into a forwardly-tapered shape.
With this arrangement, when the terminal section and the connection end portion of the wiring are connected by the connection conductive film through the contact hole, the connection conductive film is free from a step discontinuity at the pattern end of the insulation layer, thereby making it possible to improve the reliability of the connection.
As a result, it is possible to provide a manufacturing method of a liquid crystal display which can avoid the occurrence of a step discontinuity in the pixel display electrode and the subsequent disconnection in the pixel display electrode.
Moreover, the manufacturing method of a liquid crystal display of the present invention may have the following arrangement: Upon forming a first semiconductor layer for forming a thin-film transistor, a second semiconductor layer is formed also in the area of a contact hole, and a thin-film transistor, which includes the first semiconductor layer and a drain electrode having a through hole or a cut-out section which communicates with the lower layer in the areas of the source electrode and the contact hole so as to provide switching to the pixel, is formed. On this are stacked a protective film layer and a resin insulation film, and after forming a contact hole in the resin insulation film, the protective film layer below the contact hole is etched and removed, and a pixel display electrode for applying a voltage to the liquid crystal is formed in the area of the contact hole in a manner so as to contact the drain electrode.
In the above-mentioned invention, upon manufacturing a liquid crystal display, first, the thin-film transistor which is provided with the source electrode and the drain electrode for providing switching operations to the pixels is formed. Next, the protective film layer and the resin insulation film are stacked thereon, and the contact hole is formed in the resin insulation film. Thereafter, the protective film layer below this contact hole is etched and removed, and the pixel display electrode for applying a voltage to the liquid crystal is placed in the corresponding area of the contact hole in a manner so as to contact the drain electrode.
Here, in conventional methods, upon etching the protective film layer below the contact hole, the etching process stops progressing downward at the drain electrode located below, while it starts progressing sideways, with the result that the protective film layer is etched beyond the area of the contact hole.
Consequently, when the pixel display electrode is stacked on the contact hole from above, since the stacked conductor material for forming the pixel display electrode is dispersed in the area of the protective film layer on the bottom face of the contact hole, resulting in a step discontinuity in the pixel display electrode, and the subsequent electrical disconnection in the pixel display electrode.
However, in the present embodiment, the through hole or the cut-out section which communicates with the lower layer is formed in the drain electrode in the area of the contact hole. Thereafter, upon forming the first semiconductor layer for providing the thin-film transistor, the second semiconductor layer is also formed in the area of the contact hole. In this case, the second semiconductor layer is formed as a dummy.
In other words, upon forming the first semiconductor layer for providing the thin-film transistor, the second semiconductor layer is also formed in the area of the contact hole; therefore, upon etching the protective film, on the bottom face of the contact hole, the protective film, the drain electrode having the through hole or the cut-out section formed therein and the second semiconductor layer are stacked in this order from above.
Therefore, when the protective film layer is etched, first, the protective film layer is etched, and the etching direction is directed toward the second semiconductor layer that is susceptible to etching so that it is possible to avoid etching in the lateral direction to the protective film layer, and consequently to provide a forwardly-tapered shape.
For this reason, when after the etching process, the conductor material for the pixel display electrode is stacked, the conductor material is not susceptible to a step discontinuity.
As a result, it is possible to provide a manufacturing method of a liquid crystal display which can avoid the occurrence of a step discontinuity in the pixel display electrode and the subsequent disconnection in the pixel display electrode.
Moreover, the manufacturing method of the liquid crystal display of the present embodiment is preferably provided with the steps of: forming on an insulation substrate a gate wire, a gate electrode connected to the gate wire, a supplementary capacitance wire, and a supplementary capacitance electrode connected to the supplementary capacitance wire; forming a gate insulation film on the respective gate wire, the gate electrode, the supplementary capacitance wire and the supplementary capacitance electrode; forming a first semiconductor layer made by stacking an a-Si film and an n+a-Si film, above the gate electrode through the gate insulation film, as well as simultaneously forming a second semiconductor layer made by stacking an a-Si film and an n+a-Si film, above the supplementary capacitance electrode through the gate insulation film; forming a source electrode and a drain electrode, each having one end stacked on the second semiconductor layer above the gate electrode, and a source wire serving as a source line connected to the source electrode, the drain electrode having the other end also stacked on the second semiconductor layer above the supplementary capacitance electrode with the other end being provided with a cut-out section or a through hole; etching and removing the n+a-Si film of the second semiconductor layer above the supplementary capacitance electrode while using the drain electrode having the cut-out section or the through hole as a mask; simultaneously with the etching process of the n+a-Si film of the second semiconductor layer above the supplementary capacitance electrode, etching and separating the n+a-Si film of the first semiconductor layer while using as masks the source electrode and the drain electrode, each having one end stacked on the first semiconductor layer above the gate electrode; forming a protective film layer over the entire surface of the substrate; forming a resin insulation film on the protective film layer; forming a contact hole in the resin insulation film with the pattern of the cut-out section or the through hole of the drain electrode above the supplementary capacitance electrode being allowed to traverse the contact hole as well as simultaneously removing the resin insulation layer on the source signal input terminal, the gate signal input terminal and the supplementary capacitance signal input terminal; simultaneously etching and removing the protective film layer on the source signal input terminal, the gate signal input terminal and the supplementary capacitance signal input terminal and the protective film layer on the bottom face section within the contact hole, while using as etching masks the patterned resin insulation layer and the pattern of the cut-out section or the through hole of the drain electrode within the contact hole; and etching the gate insulation film on the gate signal input terminal and the supplementary capacitance signal input terminal so as to remove the gate insulation film on the gate signal input terminal, as well as simultaneously etching the a-Si film of the second semiconductor layer at a portion thereof exposed to an area surrounded by the cut-out section or the through hole of the drain electrode and the contact hole.
Therefore, inside the contact hole in the resin insulation film, the cut-out section or the through hole is formed in the drain electrode in a manner so as to traverse the contact hole, and the second semiconductor layer is formed between the drain electrode and the gate insulation film that is the lower layer; thus, the second semiconductor layer has an intermediate etching selectivity between the protective film layer and the drain electrode so that the etching process is allowed to progress downward to the second semiconductor layer, and is not allowed to progress sideways.
For this reason, the etching process provides a forwardly-tapered shape on the bottom face of the contact hole; therefore, even when the pixel display electrode is formed from the inside of the contact hole to the surface of the resin insulation layer, it is possible to prevent a step discontinuity occurring in the pixel display electrode within the contact hole.
For a fuller understanding of the nature and advantages of the invention, reference should be made to the ensuing detailed description taken in conjunction with the accompanying drawings.